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| a FEATURES Single Supply Operation Output Swings Rail to Rail Input Voltage Range Extends Below Ground Single Supply Capability from +3 V to +36 V High Load Drive Capacitive Load Drive of 500 pF, G = +1 Output Current of 15 mA, 0.5 V from Supplies Excellent AC Performance on 2.6 mA/Amplifier -3 dB Bandwidth of 16 MHz, G = +1 350 ns Settling Time to 0.01% (2 V Step) Slew Rate of 22 V/ s Good DC Performance 800 V Max Input Offset Voltage 2 V/ C Offset Voltage Drift 25 pA Max Input Bias Current Low Distortion -108 dBc Worst Harmonic @ 20 kHz Low Noise 16 nV/Hz @ 10 kHz No Phase Inversion with Inputs to the Supply Rails APPLICATIONS Battery Powered Precision Instrumentation Photodiode Preamps Active Filters 12- to 16-Bit Data Acquisition Systems Medical Instrumentation Dual, 16 MHz, Rail-to-Rail FET Input Amplifier AD823 CONNECTION DIAGRAM 8-Pin Plastic Mini-DIP and 8-Lead SOIC OUT1 -IN1 +IN1 -VS 1 2 3 4 8 +VS 7 OUT2 6 -IN2 AD823 5 +IN2 The AD823 is available over the industrial temperature range of -40C to +85C and is offered in both 8-pin plastic DIP and SOIC packages. 3V RL = 100k CL = 50pF VS = +3V GND PRODUCT DESCRIPTION 500mV 200s The AD823 is a dual precision, 16 MHz, JFET input op amp that can operate from a single supply of +3.0 V to +36 V, or dual supplies of 1.5 V to 18 V. It has true single supply capability with an input voltage range extending below ground in single supply mode. Output voltage swing extends to within 50 mV of each rail for IOUT 100 A providing outstanding output dynamic range. Offset voltage of 800 V max, offset voltage drift of 2 V/C, input bias currents below 25 pA and low input voltage noise provide dc precision with source impedances up to a Gigohm. 16 MHz, -3 dB bandwidth, -108 dB THD @ 20 kHz and 22 V/s slew rate are provided with a low supply current of 2.6 mA per amplifier. The AD823 drives up to 500 pF of direct capacitive load as a follower, and provides an output current of 15 mA, 0.5 V from the supply rails. This allows the amplifier to handle a wide range of load conditions. This combination of ac and dc performance, plus the outstanding load drive capability results in an exceptionally versatile amplifier for applications such as A/D drivers, high-speed active filters, and other low voltage, high dynamic range systems. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. OUTPUT - dB Figure 1. Output Swing, VS = +3 V, G = +1 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 1k 10k 100k 1M FREQUENCY - Hz 10M VS = +5V G = +1 Figure 2. Small Signal Bandwidth, G = +1 (c) Analog Devices, Inc., 1995 One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 AD823-SPECIFICATIONS (@ T = +25C, V = +5 V, R = 2 k to +2.5 V, unless otherwise noted) A S L Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth, VO 0.2 V p-p Full Power Response Slew Rate Settling Time to 0.1% to 0.01% NOISE/DISTORTION PERFORMANCE Input Voltage Noise Input Current Noise Harmonic Distortion Crosstalk f = 1 kHz f = 1 MHz DC PERFORMANCE Initial Offset Max Offset Over Temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX INPUT CHARACTERISTICS Input Common-Mode Voltage Range Input Resistance Input Capacitance Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing IL = 100 A IL = 2 mA IL = 10 mA Output Current Short Circuit Current Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio Specification subject to change without notice. Conditions G = +1 VO = 2 V p-p G = -1, VO = 4 V Step G = -1, VO = 2 V Step Min 12 14 AD823A Typ 16 3.5 22 320 350 Max Units MHz MHz V/s ns ns nV/Hz fA/Hz dBc f = 10 kHz f = 1 kHz RL = 600 to 2.5 V, VO = 2 V p-p, f = 20 kHz RL = 5 k RL = 5 k 16 1 -108 -130 -93 0.2 0.3 2 3 0.5 2 0.5 20 20 45 0.8 2.0 25 5 20 dB dB mV mV V/C pA nA pA nA V/mV V/mV V pF dB VCM = 0 V to +4 V VO = 0.2 V to 4 V RL = 2 k VCM = 0 V to 3 V -0.2 to 3 -0.2 to 3.8 1013 1.8 60 76 VOUT = 0.5 V to 4.5 V Sourcing to 2.5 V Sinking to 2.5 V G = +1 +3 TMIN to TMAX, Total VS = +5 V to +15 V, TMIN to TMAX 70 0.025 to 4.975 0.08 to 4.92 0.25 to 4.75 16 40 30 500 +36 5.6 V V V mA mA mA pF V mA dB 5.2 80 -2- REV. 0 AD823 SPECIFICATIONS Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth, VO 0.2 V p-p Full Power Response Slew Rate Settling Time to 0.1% to 0.01% NOISE/DISTORTION PERFORMANCE Input Voltage Noise Input Current Noise Harmonic Distortion Crosstalk f = 1 kHz f = 1 MHz DC PERFORMANCE Initial Offset Max Offset Over Temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX INPUT CHARACTERISTICS Input Common-Mode Voltage Range Input Resistance Input Capacitance Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing IL = 100 A IL = 2 mA IL = 10 mA Output Current Short Circuit Current Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio Specification subject to change without notice. (@ TA = +25C, VS = +3.3 V, RL = 2 k to +1.65 V, unless otherwise noted) Conditions G = +1 VO = 2 V p-p G = -1, VO = 2 V Step G = -1, VO = 2 V Step Min 12 13 AD823A Typ 15 3.2 20 250 300 f = 10 kHz f = 1 kHz RL = 100 , VO = 2 V p-p, f = 20 kHz RL = 5 k RL = 5 k 16 1 -93 -130 -93 0.2 0.5 2 3 0.5 2 0.5 15 12 30 1.5 2.5 25 5 20 Max Units MHz MHz V/s ns ns nV/Hz fA/Hz dBc dB dB mV mV V/C pA nA pA nA V/mV V/mV V pF dB VCM = 0 V to +2 V VO = 0.2 V to 2 V RL = 2 k VCM = 0 V to 1 V -0.2 to 1 -0.2 to 1.8 1013 1.8 54 70 VOUT = 0.5 V to 2.5 V Sourcing to 1.5 V Sinking to 1.5 V G = +1 +3 TMIN to TMAX, Total VS = +3.3 V to +15 V, TMIN to TMAX 70 0.025 to 3.275 0.08 to 3.22 0.25 to 3.05 15 40 30 500 +36 5.7 V V V mA mA mA pF V mA dB 5.0 80 REV. 0 -3- AD823-SPECIFICATIONS Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth, VO 0.2 V p-p Full Power Response Slew Rate Settling Time to 0.1% to 0.01% NOISE/DISTORTION PERFORMANCE Input Voltage Noise Input Current Noise Harmonic Distortion Crosstalk f = 1 kHz f = 1 MHz DC PERFORMANCE Initial Offset Max Offset Over Temperature Offset Drift Input Bias Current at TMAX Input Offset Current at TMAX Open-Loop Gain TMIN to TMAX INPUT CHARACTERISTICS Input Common-Mode Voltage Range Input Resistance Input Capacitance Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing IL = 100 A IL = 2 mA IL = 10 mA Output Current Short Circuit Current Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio Specification subject to change without notice. (@ TA = +25C, VS = 15 V, RL = 2 k to 0 V, unless otherwise noted) Min 12 17 AD823A Typ 16 4 25 550 650 Max Units MHz MHz V/s ns ns nV/Hz fA/Hz dBc Conditions G = +1 VO = 2 V p-p G = -1, VO = 10 V Step G = -1, VO = 10 V Step f = 10 kHz f = 1 kHz RL = 600 , VO = 10 V p-p, f = 20 kHz RL = 5 k RL = 5 k 16 1 -90 -130 -93 0.7 1.0 2 5 60 0.5 2 0.5 30 30 60 3.5 7 30 5 20 dB dB mV mV V/C pA pA nA pA nA V/mV V/mV V pF dB VCM = 0 V VCM = -10 V VCM = 0 V VO = +10 V to -10 V RL = 2 k VCM = -15 V to +13 V -15.2 to 13 -15.2 to 13.8 1013 1.8 66 82 VOUT = -14.5 V to +14.5 V Sourcing to 0 V Sinking to 0 V G = +1 +3 TMIN to TMAX, Total VS = +5 V to +15 V, TMIN to TMAX 70 -14.95 to +14.95 -14.92 to +14.92 -14.75 to +14.75 17 80 60 500 +36 8.4 V V V mA mA mA pF V mA dB 7.0 80 -4- REV. 0 AD823 ABSOLUTE MAXIMUM RATINGS 1 MAXIMUM POWER DISSIPATION - Watts 2.0 8-PIN MINI-DIP PACKAGE TJ = +150C Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +36 V Internal Power Dissipation2 Plastic Package (N) . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Watts Small Outline Package (R) . . . . . . . . . . . . . . . . . . . 0.9 Watts Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . 1.2 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range N, R . . . . . . . . . -65C to +125C Operating Temperature Range . . . . . . . . . . . . -40C to +85C Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300C NOTES 1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-Pin Plastic Package: JA = 90C/Watt 8-Pin SOIC Package: JA = 160C/Watt 1.5 1.0 8-PIN SOIC PACKAGE 0.5 0 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 AMBIENT TEMPERATURE - C 70 80 90 Figure 3. Maximum Power Dissipation vs. Temperature ORDERING GUIDE Model AD823AN AD823AR AD823AR-REEL Temperature Range -40C to +85C -40C to +85C -40C to +85C Package Description 8-Pin Plastic DIP 8-Pin Plastic SOIC SOIC on Reel Package Option N-8 SO-8 SO-8 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD823 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. 0 -5- AD823-Typical Characteristics 80 70 60 VS = +5V 314 UNITS = 40V 100 90 80 70 VS = +5V 317 UNITS = 0.4pA 50 60 UNITS -150 -100 -50 0 50 100 INPUT OFFSET VOLTAGE - V 150 200 UNITS 40 30 20 50 40 30 20 10 0 -200 10 0 0 1 2 3 4 5 6 7 INPUT BIAS CURRENT - pA 8 9 10 Figure 4. Typical Distribution of Input Offset Voltage Figure 7. Typical Distribution of Input Bias Current 22 20 18 16 14 VS = +5V -55C TO +125C 103 UNITS 10k VS = +5V VCM = 0V 1k INPUT BIAS CURRENT - pA -5 -4 1 2 -3 -2 -1 0 3 4 5 INPUT OFFSET VOLTAGE DRIFT - V/C 6 7 100 UNITS 12 10 8 6 4 2 0 -6 10 1 0.1 0 25 50 75 TEMPERATURE - C 100 125 Figure 5. Typical Distribution of Input Offset Voltage Drift Figure 8. Input Bias Current vs. Temperature 3 2 1 VS = +5V 1k VS = 15V INPUT BIAS CURRENT - pA -4 -3 -2 -1 0 1 2 3 COMMON MODE VOLTAGE - Volts 4 5 INPUT BIAS CURRENT - pA 100 0 -1 -2 -3 -4 -5 10 1 0.1 -16 -12 -8 -4 0 4 8 COMMON MODE VOLTAGE - Volts 12 16 Figure 6. Input Bias Current vs. Common-Mode Voltage Figure 9. Input Bias Current vs. Common-Mode Voltage -6- REV. 0 AD823 110 95 94 100 93 VS = 2.5V 90 VS = +5V RL = 2k OPEN-LOOP GAIN - dB OPEN-LOOP GAIN - dB 92 91 90 89 88 87 80 70 60 100 1k 10k LOAD RESISTANCE - 100k 500k 86 -55 -25 5 35 65 TEMPERATURE - C 95 125 Figure 10. Open-Loop Gain vs. Load Resistance Figure 13. Open-Loop Gain vs. Temperature 1k RL = 10k OPEN-LOOP GAIN - k V V 100 100 80 PHASE 60 OPEN-LOOP GAIN - dB 80 PHASE MARGIN - Degrees 100 RL = 1k 10 RL = 100 1 60 40 GAIN 20 RL = 2k CL = 20pF 40 20 0 0 0.1 -2.5 -2.0 -1.5 0.5 1.0 -1.0 -0.5 0 OUTPUT VOLTAGE - Volts 1.5 2.0 2.5 -20 100 1k 10k 100k 1M FREQUENCY - Hz 10M -20 100M Figure 11. Open-Loop Gain vs. Output Voltage, VS = 2.5 V Figure 14. Open-Loop Gain and Phase vs. Frequency -40 -50 -60 RL = 600 100 VS = +5V THD - dB -70 -80 -90 VS = +3V VOUT = 2Vp-p RL = 100 VS = 15V VOUT = 10Vp-p, RL = 600 INPUT VOLTAGE NOISE - nV/Hz 30 ALL OTHERS VS = 2.5V VOUT = 2Vp-p RL = 1k VS = +3V, VOUT = 2Vp-p, RL = 5k VS = +5V VOUT = 2Vp-p RL = 5k 10 -100 -110 100 3 1M 1k 10k FREQUENCY - Hz 100k 10 100 1k 10k FREQUENCY - Hz 100k 1M Figure 12. Total Harmonic Distortion vs. Frequency Figure 15. Input Voltage Noise vs. Frequency REV. 0 -7- AD823-Typical Characteristics 5 4 G = +1 CL = 20pF RL = 2k 90 80 70 VS = 15V VS = +5V CLOSED-LOOP GAIN - dB 3 2 CMRR - dB 30 1 0 -1 -2 -3 +125C +27C -55C 60 50 40 30 -4 -5 0.3 3.27 6.24 9.21 12.18 15.15 18.12 21.09 24.06 27.03 FREQUENCY - MHz 20 10 100 1k 10k 100k FREQUENCY - Hz 1M 10M Figure 16. Closed Loop Gain vs. Frequency Figure 19. Common-Mode Rejection vs. Frequency 100 OUTPUT SATURATION VOLTAGE - Volts 10 OUTPUT RESISTANCE - 10 VS = +5V GAIN = +1 VS = +5V 1 VS - VOH +25C VOL +25C 1.0 0.1 0.1 VOL +25C 0.01 100 1k 10k 100k FREQUENCY - Hz 1M 10M 0.01 0.1 1 10 LOAD CURRENT - mA 100 Figure 17. Output Resistance vs. Frequency, VS = 5 V, Gain = +1 Figure 20. Output Saturation Voltage vs. Load Current OUTPUT STEP SIZE FROM 0V TO VSHOWN - Volts 10 8 6 SUPPLY CURRENT - mA 4 2 0 -2 -4 1% -6 -8 0.1% 0.01% VS = 15V CL = 20pF 1% 10 0.1% 0.01% 8 +125C +25C 6 -55C 4 2 -10 100 0 200 300 400 500 SETTLING TIME - ns 600 700 0 5 10 15 SUPPLY VOLTAGE - Volts 20 Figure 18. Inverter Settling Time vs. Output Step Size Figure 21. Quiescent Current vs. Supply Voltage -8- REV. 0 AD823 100 90 21 18 VIN RS CL POWER SUPPLY REJECTION - dB VS = +5V 80 SERIES RESISTANCE - 70 +PSRR 60 50 40 30 20 -PSRR 15 VS = +5V 12 9 M = 45 6 M = 20 3 10 0 100 1k 10k 100k FREQUENCY - Hz 1M 10M 0 0 1 2 3 4 5 6 7 CAPACITOR - pF 1000 8 9 10 Figure 22. Power Supply Rejection vs. Frequency Figure 25. Capacitive Load vs. Series Resistance 30 RL = 2k G = +1 -30 -40 -50 VS = +5V OUTPUT VOLTAGE - Vp-p CROSSTALK - dB 10M 20 VS = 15V -60 -70 -80 -90 -100 VS = +5V VS = +3V 10 -110 -120 -130 1k 10k 100k FREQUENCY - Hz 1M 10M 0 10k 100k 1M FREQUENCY - Hz Figure 23. Large Signal Frequency Response Figure 26. Crosstalk vs. Frequency 3V RL = 100k CL = 50pF VS = +3V VS = +3V VIN = 2.9Vp-p G = -1 GND 500mV 100k 100k VIN = 2.9V p-p 50 +3V 10s 500mV 200s VOUT 100k 50pF Figure 24. Output Swing, VS = + 3 V, G = +1 Figure 27. Output Swing, VS = +3 V, G = -1 REV. 0 -9- AD823-Typical Characteristics 5V RL = 300 CL = 50pF RF = RG = 2k VS = 15V VIN = 20Vp-p G=1 500mV GND 200s 5V 20s +15V Figure 28. Output Swing, VS = +5 V, G = -1 20kHz, 20Vp-p -15V 604 50pF Figure 31. Output Swing, VS = 15 V, G = +1 5V VS = +3V VIN = 100mV STEP G =+1 1.55V RL = 2k CL = 50pF 1.45V 25mV 50ns GND 500mV 100ns Figure 29. Pulse Response, VS = +3 V, G = +1 Figure 32. Pulse Response, VS = +5 V, G = +1 5V VS = +5V G =+2 RL = 2k CL = 50pF VS = +5V G = +1 RL = 2k CL = 470pF 500mV GND 100ns 50mV 200ns Figure 30. Pulse Response, VS = +5 V , G = +2 Figure 33. Pulse Response, VS = +5 V, G = +1, CL = 470 pF -10- REV. 0 AD823 RL = 100k CL = 50pF 10V -10V 5V 500ns Figure 34. Pulse Response, VS = 15 V, G = +1 THEORY OF OPERATION This AD823 is fabricated on Analog Devices' proprietary complementary bipolar (CB) process that enables the construction of pnp and npn transistors with similar fTs in the 600 MHz to 800 MHz region. In addition, the process also features N-channel JFETs, which are used in the input stage of the AD823. These process features allow the construction of high frequency, low distortion op amps with picoampere input currents. This design uses a differential-output input stage to maximize bandwidth and headroom (see Figure 35). The smaller signal swings required on the S1P, S1N outputs reduce the effect of nonlinear currents due to junction capacitances and improve the distortion performance. With this design harmonic distortion of better than -91 dB @ 20 kHz into 600 with VOUT = 4 V p-p on a single 5 volt supply is achieved. The complementary commonemitter design of the output stage provides excellent load drive without the need for emitter followers, thereby improving the output range of the device considerably with respect to conventional op amps. The AD823 can drive 20 mA with the outputs within 0.6 V of the supply rails. The AD823 also offers outstanding precision for a high speed op amp. Input offset voltages VCC R42 R37 VBE + 0.3V V1 I5 of 1 mV max and offset drift of 2 V/C are achieved through the use of Analog Devices' advanced thin-film trimming techniques. A "Nested Integrator" topology is used in the AD823 (see smallsignal schematic shown in Figure 36). The output stage can be modeled as an ideal op amp with a single-pole response and a unity-gain frequency set by transconductance gm2 and capacitor C2. R1 is the output resistance of the input stage; gm is the input transconductance. C1 and C5 provide Miller compensation for the overall op amp. The unity gain frequency will occur at gm/C5. Solving the node equations for this circuit yields: V OUT Vi = A0 g ( sR1[C1( A2 + 1)] + 1) x s m2 + 1 C2 where: A0 = gmgm2R2R1 (Open Loop Gain of Op Amp) A2 = gm2R2 (Open Loop Gain of Output Stage) Q44 A=1 Q57 A=19 Q43 Q55 I6 Q72 J1 VINP J6 Q61 Q46 Q58 Q49 Q18 C2 R44 Q21 R28 Q54 VOUT VINN S1P S1N Q62 Q60 VCC Q48 Q53 Q35 VB C1 I1 C6 R33 I2 R43 I3 Q56 Q52 I4 Q59 A=1 Q17 A=19 VEE Figure 35. Simplified Schematic REV. 0 -11- AD823 The first pole in the denominator is the dominant pole of the amplifier, and occurs at about 18 Hz. This equals the input stage output impedance R1 multiplied by the Miller-multiplied value of C1. The second pole occurs at the unity-gain bandwidth of the output stage, which is 23 MHz. This type of architecture allows more open loop gain and output drive to be obtained than a standard two-stage architecture would allow. OUTPUT IMPEDANCE APPLICATION NOTES INPUT CHARACTERISTICS In the AD823, n-channel JFETs are used to provide a low offset, low noise, high impedance input stage. Minimum input common-mode voltage extends from 0.2 V below -VS to 1 V less than +VS. Driving the input voltage closer to the positive rail will cause a loss of amplifier bandwidth and increased common-mode voltage error. The AD823 does not exhibit phase reversal for input voltages up to and including +VS. Figure 37a shows the response of an AD823 voltage follower to a 0 V to +5 V (+VS) square wave input. The input and output are superimposed. The output polarity tracks the input polarity up to +VS--no phase reversal. The reduced bandwidth above a 4 V input causes the rounding of the output wave form. For input voltages greater than +VS, a resistor in series with the AD823's plus input will prevent phase reversal, at the expense of greater input voltage noise. This is illustrated in Figure 37b. 1V 100 90 The low frequency open loop output impedance of the common-emitter output stage used in this design is approximately 30 k. While this is significantly higher than a typical emitter follower output stage, when connected with feedback the output impedance is reduced by the open loop gain of the op amp. With 109 dB of open loop gain the output impedance is reduced to less than 0.2 . At higher frequencies the output impedance will rise as the open loop gain of the op amp drops; however, the output also becomes capacitive due to the integrator capacitors C1 and C2. This prevents the output impedance from ever becoming excessively high (see Figure 17), which can cause stability problems when driving capacitive loads. In fact, the AD823 has excellent cap-load drive capability for a high frequency op amp. Figure 33 shows the AD823 connected as a follower while driving 470 pF direct capacitive load. Under these conditions the phase margin is approximately 20. If greater phase margin is desired a small resistor can be used in series with the output to decouple the effect of the load capacitance from the op amp (see Figure 25). In addition, running the part at higher gains will also improve the capacitive load drive capability of the op amp. 2s 10 GND 0% 1V a. Response with RP = 0; VIN from 0 to VS S1N gmVI R1 S1P gmVI R1 C5 R2 gm2 C1 1V VOUT C2 1V 10s +VS 100 90 10 GND 0% Figure 36. Small Signal Schematic 1V +5V R VIN P AD823 VOUT b. VIN = 0 to +VS + 200 mV; VOUT = 0 to +VS; RP = 49.9 k Figure 37. AD823 Input Response -12- REV. 0 AD823 Since the input stage uses n-channel JFETs, input current during normal operation is negative; the current flows out from the input terminals. If the input voltage is driven more positive than +VS - 0.4 V, the input current will reverse direction as internal device junctions become forward biased. This is illustrated in Figure 6. A current limiting resistor should be used in series with the input of the AD823 if there is a possibility of the input voltage exceeding the positive supply by more than 300 mV, or if an input voltage will be applied to the AD823 when VS = 0. The amplifier will be damaged if left in that condition for more than 10 seconds. A 1 k resistor allows the amplifier to withstand up to 10 volts of continuous overvoltage, and increases the input voltage noise by a negligible amount. Input voltages less than -VS are a completely different story. The amplifier can safely withstand input voltages 20 volts below the minus supply voltage as long as the total voltage from the positive supply to the input terminal is less than 36 volts. In addition, the input stage typically maintains picoamp level input currents across that input voltage range. The AD823 is designed for 16 nV/Hz wideband input voltage noise and maintains low noise performance to low frequencies (refer to Figure 15). This noise performance, along with the AD823's low input current and current noise means that the AD823 contributes negligible noise for applications with source resistances greater than 10 k and signal bandwidths greater than 1 kHz. OUTPUT CHARACTERISTICS Figure 38 shows a schematic of an AD823 being used to drive both the input and reference input of an AD1672, a 12-bit 3 MSPS single supply A/D converter. One amplifier is configured as a unity gain follower to drive the analog input of the AD1672 which is configured to accept an input voltage that ranges from 0 to 2.5 V. +5VA +5VA 0.1F 2 VIN 3 8 1 49.9 10F 10F 0.1 F +5VD +5VD 10 F 0.1F 20 REFOUT 21 AIN1 22 AIN2 0.1 F 28 19 +VCC +VDD 15 13 14 12 11 10 9 8 7 6 5 4 3 2 1 OTR BIT1 (MSB) BIT2 BIT3 BIT4 BIT5 BIT6 BIT7 BIT8 BIT9 BIT10 BIT11 BIT12 (LSB) AD823 VREF (1.25V) 5 7 6 4 1k AD1672 23 REFIN 24 IN COM 25 NCOMP2 26 NCOMP1 1k 27 ACOM CLOCK 16 REF D COM COM 19 18 Figure 38. AD823 Driving Input and Reference of the AD1672, a 12-Bit 3 MSPS A/D Converter The AD823's unique bipolar rail-to-rail output stage swings within 25 mV of the supplies with no external resistive load. The AD823's approximate output saturation resistance is 25 sourcing and sinking. This can be used to estimate output saturation voltage when driving heavier current loads. For instance, when driving 5 mA, the saturation voltage to the rails will be approximately 125 mV. If the AD823's output is driven hard against the output saturation voltage, it will recover within 250 ns of the input returning to the amplifier's linear operating region. A/D Driver The other amplifier is configured as a gain of two to drive the reference input from a 1.25 V reference. Although the AD1672 has its own internal reference, there are systems that require greater accuracy than the internal reference provides. On the other hand, if the AD1672 internal reference is used, the second AD823 amplifier can be used to buffer the reference voltage for driving other circuitry while minimally loading the reference source. The circuit was tested with a 500 kHz sine wave input that was heavily low pass filtered (60 dB) to minimize the harmonic content at the input to the AD823. The digital output of the AD1672 was analyzed by performing an FFT. During the testing, it was observed that at 500 kHz, the output of the AD823 cannot go below about 350 mV (operating with negative supply at ground) without seriously degrading the second harmonic distortion. Another test was performed with a 200 pull-down resistor to ground that allowed the output to go as low as 200 mV without seriously affecting the second harmonic distortion. There was, however, a slight increase in the third harmonic term with the resistor added, but it was still less than the second harmonic. The rail-to-rail output of the AD823 makes it useful as an A/D driver in a single supply system. Because it is a dual op amp, it can be used to drive both the analog input of the A/D along with its reference input. The high impedance FET input of the AD823 is well suited for minimally loading of high output impedance devices. REV. 0 -13- AD823 Figure 39 is an FFT plot of the results of driving the AD1672 with the AD823 with no pull-down resistor. The input amplitude was 2.15 V p-p and the lower voltage excursion was 350 mV. The input frequency was 490 kHz, which was chosen to spread the location of the harmonics. The distortion analysis is important for systems requiring good frequency domain performance. Other systems may require good time domain performance. The noise and settling time performance of the AD823 will provide the necessary information for its applicability for these systems. 1 +3V 95.3k CHANNEL 1 1F MYLAR 95.3k 8 3 1/2 47.5k AD823 2 1 0.1F + 500F 0.1F 95.3k 10k 4.99k HEADPHONES 32 IMPEDANCE 10k L R 4.99k VIN = 2.15Vp-p G = +1 FI = 490kHz 15dB/DIV 2 4 5 6 9 7 3 8 6 1F CHANNEL 2 MYLAR 47.5k 1/2 AD823 5 4 500F 7 + Figure 40. 3 Volt Single Supply Stereo Headphone Driver Second Order Low-Pass Filter Figure 41 depicts the AD823 configured as a second order Butterworth low-pass filter. With the values as shown, the corner frequency will be 200 kHz. The equations for component selection are shown below: R1 = R2 = user selected (typical values: 10 k to 100 k). Figure 39. FFT of AD1672 Output Driven by AD823 3 Volt, Single Supply Stereo Headphone Driver C1( farads ) = 1.414 0.707 ; C2 = 2 fcutoff R1 2 fcutoff R1 The AD823 exhibits good current drive and THD+N performance, even at 3 V single supplies. At 20 kHz, total harmonic distortion plus noise (THD+N) equals -62 dB (0.079%) for a 300 mV p-p output signal. This is comparable to other single supply op amps which consume more power and cannot run on 3 V power supplies. In Figure 40, each channel's input signal is coupled via a 1 F Mylar capacitor. Resistor dividers set the dc voltage at the noninverting inputs so that the output voltage is midway between the power supplies (+1.5 V). The gain is 1.5. Each half of the AD823 can then be used to drive a headphone channel. A 5 Hz high-pass filter is realized by the 500 F capacitors and the headphones, which can be modeled as 32 ohm load resistors to ground. This ensures that all signals in the audio frequency range (20 Hz-20 kHz) are delivered to the headphones. C2 56pF R1 20k VIN C1 28pF R2 20k +5V C3 0.1F 1/2 AD823 50pF VOUT C4 0.1F -5V Figure 41. Second Order Low-Pass Filter A plot of the filter is shown below; better than 50 dB of high frequency rejection is provided. -14- REV. 0 AD823 0 HIGH FREQUENCY REJECTION - dB -10 VDB - VOUT -20 put at node C is then a full-wave rectified version of the input. Node B is a buffered half-wave rectified version of the input. Input voltage supply to 18 volts can be rectified, depending on the voltage supply used. R1 100k R2 100k -30 -40 +VS A 3 VIN 2 0.01F 8 A1 4 1 6 5 A2 7 C FULL-WAVE RECTIFIED OUTPUT -50 -60 1k 1/2 AD823 1/2 AD823 10k 100k 1M FREQUENCY - Hz 10M 100M B HALF-WAVE RECTIFIED OUTPUT Figure 42. Frequency Response of Filter Single-Supply Half-Wave and Full-Wave Rectifiers An AD823 configured as a unity gain follower and operated with a single supply can be used as a simple half-wave rectifier. The AD823's inputs maintain picoamp level input currents even when driven well below the minus supply. The rectifier puts that behavior to good use, maintaining an input impedance of over 1011 for input voltages from 1 volt from the positive supply to 20 volts below the negative supply. The full- and half-wave rectifier shown in Figure 43 operates as follows: when VIN is above ground, R1 is bootstrapped through the unity gain follower A1 and the loop of amplifier A2. This forces the inputs of A2 to be equal, thus no current flows through R1 or R2, and the circuit output tracks the input. When VIN is below ground, the output of A1 is forced to ground. The noninverting input of amplifier A2 sees the ground level output of A1, therefore, A2 operates as a unity gain inverter. The out- 2V 100 2V 200s A 90 B 10 C 0% 2V Figure 43. Single Supply Half- and Full-Wave Rectifier REV. 0 -15- AD823 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic DIP (N-8) C2035-7.5-5/95 8 PIN 1 1 4 5 0.25 (6.35) 0.31 (7.87) 0.39 (9.91) MAX 0.0350.01 (0.890.25) 0.30 (7.62) REF 0.1650.01 (4.190.25) 0.125 (3.18) MIN 0.0180.003 (0.460.08) 0.10 (2.54) BSC 0.033 (0.84) NOM 0.180.03 (4.570.76) 0.0110.003 (0.280.08) 15 0 SEATING PLANE 8-Lead Plastic SOIC (SO-8) 8 5 0.1574 (4.00) 0.1497 (3.80) PIN 1 1 4 0.2440 (6.20) 0.2284 (5.80) 0.1968 (5.00) 0.1890 (4.80) 0.0098 (0.25) 0.0040 (0.10) 0.0500 (1.27) BSC 0.0688 (1.75) 0.0532 (1.35) 0.0192 (0.49) 0.0138 (0.35) 8 0 0.0196 (0.50) x 45 0.0099 (0.25) 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) -16- REV. 0 PRINTED IN U.S.A. |
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